MPEG-2 HDTV Single-Chip Codec LSI/Decoder LSI
VASA Series
| VASA/C is the world’s first single chip LSI capable of encoding HDTV video. Offering excellent image quality and stability, it is widely used in Japan and the worldwide broadcast market and has earned an enviable reputation. A decoder LSI, VASA/D, is also available. |  |
Key features
- Supports multiple formats:
Video encoding: 480i, 480p, 720p, 1080-24p, 1080i
Video decoding: 480i, 480p, 720p, 1080-24p, 1080i - Professional video quality recognized in markets worldwide
- Broad motion estimation capability for efficient compression while preserving excellent image quality (horizontal: -211.5 to +211.5, vertical: -113.5 to +113.5)
- Supports high bit rates (max. 160 Mbps)
Applications
- SNG (Satellite News Gathering)
- ENG (Electronic News Gathering)
- FPU (Field Pick up Units)
- Program servers
- Commercial servers
- Transmission encoders
Specifications
Specification: Codec LSI, VASA/C
| Video Format | 1080i | 1080p | 720p | 480p | 480i |
| Video Standard | ISO/IEC 13818-2 | ||||
| Profile & Level | 422P@HL MP@H14L MP@HL |
422P@HL MP@H14L MP@HL |
422P@HL MP@HL |
422P@HL MP@H14L |
422P@ML MP@ML SP@ML |
| Video Input Format | 1920/1440 x 1080 @25Hz/29.97Hz/30Hz *1 |
1920/1440 x 1080 @23.976Hz/24Hz *1 |
1280 x 720 @59.94Hz/60Hz |
720 x 480 @59.94Hz/60Hz |
720 x 512/480 @29.97Hz 720 x 608/576 @25Hz |
| Video Input | 10bit(Y), 10bit(C) | 10bit(Y/C) | |||
| GOP Size | 1 to 30 | ||||
| Picture Structure | Frame Structure only | ||||
| Motion Estimate Search Range (Max) | Horizontal: -211.5 to +211.5 pixel Vertical: -113.5 to +113.5 pixel |
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| TS output | 8bit parallel(Prepared for DVB-SPI) | ||||
| TS output Bit rate | Up to 160 Mbps (TS Clock frequency Max 20 MHz) | ||||
| Host CPU Interface | Data Bus: 32bit, Address Input: 18bit | ||||
| System CLK Input | 50.7MHz | ||||
| Peripheral (External Memory) |
For image processing DDR-SDRAM 256 Mbits x 2(32bit, clock 222 MHz, Cas latency 3) or DDR-SDRAM 128 Mbits x 4(32bit、clock 222 MHz, Cas latency 3) For control firmware SDRAM 128 M bits x 1(16bit, burst length 4, Cas latency 3, clock 133 MHz) or SDRAM 256 M bits x 1(16bit, burst length 4, Cas latency 3, clock 133 MHz) |
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| Package | 1008-pin P-BGA (35 x 35mm) | ||||
| Supply Voltage | 3.3V(I/O), 2.5V(from/to DDR-SDRAM), 1.5V(Core), 1.25V(SSTL2 reference voltage) | ||||
| Power consumption | 6.0W (approx.) | ||||
*1 In the case that Encoding Format is 1440, embedded "convert from 1920 pixels to 1440 pixels sub-sample filter" is used.
Specification: Decoder LSI, VASA/D
| Video Format | 1080i | 1080p | 720p | 480p | 480i |
| Standard | ISO/IEC 13818-2 | ||||
| Profile & Level | 422P@HL MP@H14L MP@HL SP@H14L SP@HL |
422P@HL MP@H14L MP@HL SP@H14L SP@HL |
422P@HL MP@HL SP@HL |
422P@ML MP@H14L |
422P@ML MP@ML SP@ML |
| Video Output Format | 1920/1440 x 1080 @25Hz/29.97Hz/30Hz |
1920/1440 x 1080 @23.976Hz/24Hz |
1280 x 720 @59.94Hz/60Hz |
720 x 480 @59.94Hz/60Hz |
720 x 512/480 @29.97Hz 720 x 608/576 @25Hz |
| Video Out | 10bit(Y), 10bit(C) | 10bit(Y/C) | |||
| TS input | 8bit parallel | ||||
| Host CPU Interface | Data Bus : 32bit, Address Input : 18bit | ||||
| System CLK Input | 50MHz | ||||
| Peripheral (External Memory) | DDR-SDRAM 128M-bits x 2(32bit, clock 200MHz, Cas latency 3) | ||||
| Package | 1008-pin P-BGA (35 x 35mm) | ||||
| Supply Voltage | 3.3V(I/O), 2.5V(from/to DDR-SDRAM), 1.5V(Core), 1.25V(SSTL2 Refernce Voltage) | ||||
| Power consumption | 2.5W (approx.) | ||||